تعريف VHDL

VHDL is a hardware description language . it describes the behavior of an electronic circuit or system , from which the physical circuit or system can then be attained (implemented) .

once the vhdl code has been written , it can be used either to implement  the circuit in a programmable device (from Altra,Xilinx ,Atmel , etc)  or can be submitted to foundry for fabrication of an ASIC chip . Currently , many complex commercial chips (microcontrollers , for example) are designed using such an approach .

Basic VHDL Code:-

library declarations is To declare a Library (that is to make visible to the design) two lines of code are needed , one containing the name of the library , and the other a use clause , as shown in the syntax below .
LIBRARY library_name ;USE library_name.package_name.package_parts;

ENTITYentity is a list with specifications of all input and output pins (ports)of the circuit . its syntax is show below.
ENTITY entity_name is port (port_name: signal_mode signal_type;port_name: signal_mode signal_type;...... ) ;end entity_name;

architecture the architecture is a description of how the circuit should behave (function) . its syntax is the following:
ARCHITECTURE architecture_name of entity_name is [declaration] BEGIN (Code)end architecture_name;